Add zeroc interrupt support for tsens in yaml.
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@xxxxxxxxxxxxxx>
---
.../bindings/thermal/qcom-tsens.yaml | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 2ddd39d96766..717b0dd967e2 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -52,12 +52,14 @@ properties:
items:
- description: Combined interrupt if upper or lower threshold crossed
- description: Interrupt if critical threshold crossed
+ - description: Interrupt if zeroC threshold is crossed
interrupt-names:
minItems: 1
items:
- const: uplow
- const: critical
+ - const: zeroc
nvmem-cells:
minItems: 1
@@ -109,8 +111,10 @@ allOf:
properties:
interrupts:
minItems: 2
+ maxItems: 3
interrupt-names:
minItems: 2
+ maxItems: 3
required:
- compatible
@@ -174,4 +178,21 @@ examples:
#qcom,sensors = <13>;
#thermal-sensor-cells = <1>;
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example 4 (for any platform containing v2.6+ of the TSENS IP):
+ tsens4: thermal-sensor@c265000 {
+ compatible = "qcom,sc7180-tsens", "qcom,tsens-v2";
+ reg = <0xc265000 0x1ff>,
+ <0xc223000 0x1ff>;
+
+ interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 501 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uplow", "critical", "zeroc";
+
+ #qcom,sensors = <15>;
+ #thermal-sensor-cells = <1>;
+ };
...
--
2.26.2
