On Fri, May 08, 2020 at 04:29:41PM +0300, Serge Semin wrote:
> Tx-only DMA transfers are working perfectly fine since in this case
> the code just ignores the Rx FIFO overflow interrupts. But it turns
> out the SPI Rx-only transfers are broken since nothing pushing any
> data to the shift registers, so the Rx FIFO is left empty and the
> SPI core subsystems just returns a timeout error. Since DW DMAC
> driver doesn't support something like cyclic write operations of
> a single byte to a device register, the only way to support the
> Rx-only SPI transfers is to fake it by using a dummy Tx-buffer.
> This is what we intend to fix in this commit by setting the
> SPI_CONTROLLER_MUST_TX flag for DMA-capable platform.
Hmm... If Mark consider this a right thing to do, then it's fine.
I didn't investigate what this flag may produce as a side effect.
> --- a/drivers/spi/spi-dw.c
> +++ b/drivers/spi/spi-dw.c
> @@ -524,6 +524,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
> dws->dma_inited = 0;
> } else {
> master->can_dma = dws->dma_ops->can_dma;
> + master->flags |= SPI_CONTROLLER_MUST_TX;
> }
> }
>
> --
> 2.25.1
>
--
With Best Regards,
Andy Shevchenko
