+Cc: Mark (question about SPI + DMA workflow) On Fri, May 08, 2020 at 01:53:02PM +0300, Serge Semin wrote: > Multi-block support provides a way to map the kernel-specific SG-table so > the DW DMA device would handle it as a whole instead of handling the > SG-list items or so called LLP block items one by one. So if true LLP > list isn't supported by the DW DMA engine, then soft-LLP mode will be > utilized to load and execute each LLP-block one by one. A problem may > happen for multi-block DMA slave transfers, when the slave device buffers > (for example Tx and Rx FIFOs) depend on each other and have size smaller > than the block size. In this case writing data to the DMA slave Tx buffer > may cause the Rx buffer overflow if Rx DMA channel is paused to > reinitialize the DW DMA controller with a next Rx LLP item. In particular > We've discovered this problem in the framework of the DW APB SPI device Mark, do we have any adjustment knobs in SPI core to cope with this? > working in conjunction with DW DMA. Since there is no comprehensive way to > fix it right now lets at least print a warning for the first found > multi-blockless DW DMAC channel. This shall point a developer to the > possible cause of the problem if one would experience a sudden data loss. -- With Best Regards, Andy Shevchenko
