On Wed, May 06, 2020 at 08:42:23PM +0300, Sergey.Semin@xxxxxxxxxxxxxxxxxxxx wrote: > From: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > According to the MIPS32 InterAptiv software manual error codes 24 - 26 > of CM2 indicate L2 ECC/parity error with switching to a corresponding > errors info fields. This patch provides these errors parsing code, > which handles the read/write uncorrectable and correctable ECC/parity > errors, and prints instruction causing the fault, RAM array type, cache > way/dword and syndrome associated with the faulty data. > > Co-developed-by: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> > Cc: Paul Burton <paulburton@xxxxxxxxxx> > Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> > Cc: Arnd Bergmann <arnd@xxxxxxxx> > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: linux-pm@xxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx > --- > arch/mips/kernel/mips-cm.c | 62 ++++++++++++++++++++++++++++++++++++-- > 1 file changed, 60 insertions(+), 2 deletions(-) applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
