The PRG_ETHERNET registers on Meson8b and newer SoCs can add an RX delay. Add a property with the known supported values so it can be configured according to the board layout. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> --- .../bindings/net/amlogic,meson-dwmac.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index ae91aa9d8616..8d851f59d9f2 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -67,6 +67,19 @@ allOf: PHY and MAC are adding a delay). Any configuration is ignored when the phy-mode is set to "rmii". + amlogic,rx-delay-ns: + $ref: /schemas/types.yaml#definitions/uint32 + enum: + - 0 + - 2 + description: + The internal RGMII RX clock delay (provided by this IP block) in + nanoseconds. When phy-mode is set to "rgmii" then the RX delay + should be explicitly configured. When not configured a fallback of + 0ns is used. When the phy-mode is set to either "rgmii-id" or + "rgmii-rxid" the RX clock delay is already provided by the PHY. + Any configuration is ignored when the phy-mode is set to "rmii". + properties: compatible: additionalItems: true -- 2.26.2