Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC

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Subject: Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
From: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
Date: Wed, 29 Apr 2020 13:33:08 +0200
Cc: linux-kernel@xxxxxxxxxxxxxxx, linux-mtd@xxxxxxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, miquel.raynal@xxxxxxxxxxx, richard@xxxxxx, vigneshr@xxxxxx, arnd@xxxxxxxx, brendanhiggins@xxxxxxxxxx, tglx@xxxxxxxxxxxxx, anders.roxell@xxxxxxxxxx, masonccyang@xxxxxxxxxxx, robh+dt@xxxxxxxxxx, linux-mips@xxxxxxxxxxxxxxx, hauke.mehrtens@xxxxxxxxx, andriy.shevchenko@xxxxxxxxx, qi-ming.wu@xxxxxxxxx, cheol.yong.kim@xxxxxxxxx
In-reply-to: <20200429104205.18780-3-vadivel.muruganx.ramuthevar@linux.intel.com>
Organization: Collabora

On Wed, 29 Apr 2020 18:42:05 +0800
"Ramuthevar,Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:

> +#define NAND_WRITE_CMD		(EBU_CON_CS_P_LOW | HSNAND_CLE_OFFS)
> +#define NAND_WRITE_ADDR		(EBU_CON_CS_P_LOW | HSNAND_ALE_OFFS)
> +

I thought we agreed on dropping those definitions.

Follow-Ups:
- Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
  - From: Ramuthevar, Vadivel MuruganX

References:
- [PATCH v4 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
  - From: Ramuthevar,Vadivel MuruganX
- [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
  - From: Ramuthevar,Vadivel MuruganX

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