Convert the UniPhier USB2-PHY conroller to DT schema format. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx> --- .../bindings/phy/socionext,uniphier-usb2-phy.yaml | 85 ++++++++++++++++++++++ .../devicetree/bindings/phy/uniphier-usb2-phy.txt | 45 ------------ 2 files changed, 85 insertions(+), 45 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml new file mode 100644 index 0000000..479b203 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier USB2 PHY + +description: | + This describes the devicetree bindings for PHY interface built into + USB2 controller implemented on Socionext UniPhier SoCs. + Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3 + controller doesn't include its own High-Speed PHY. This needs to specify + USB2 PHY instead of USB3 HS-PHY. + +maintainers: + - Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx> + +properties: + compatible: + enum: + - socionext,uniphier-pro4-usb2-phy + - socionext,uniphier-ld11-usb2-phy + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^phy@[0-9]+$": + type: object + additionalProperties: false + + properties: + reg: + minimum: 0 + maximum: 3 + description: + The ID number for the PHY + + "#phy-cells": + const: 0 + + required: + - reg + - "#phy-cells" + +required: + - compatible + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node. + + soc-glue@5f800000 { + compatible = "socionext,uniphier-ld11-soc-glue", "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + + usb-controller { + compatible = "socionext,uniphier-ld11-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; + + usb_phy0: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + usb_phy1: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + usb_phy2: phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt b/Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt deleted file mode 100644 index b43b282..0000000 --- a/Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt +++ /dev/null @@ -1,45 +0,0 @@ -Socionext UniPhier USB2 PHY - -This describes the devicetree bindings for PHY interface built into -USB2 controller implemented on Socionext UniPhier SoCs. - -Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3 -controller doesn't include its own High-Speed PHY. This needs to specify -USB2 PHY instead of USB3 HS-PHY. - -Required properties: -- compatible: Should contain one of the following: - "socionext,uniphier-pro4-usb2-phy" - for Pro4 SoC - "socionext,uniphier-ld11-usb2-phy" - for LD11 SoC - -Sub-nodes: -Each PHY should be represented as a sub-node. - -Sub-nodes required properties: -- #phy-cells: Should be 0. -- reg: The number of the PHY. - -Sub-nodes optional properties: -- vbus-supply: A phandle to the regulator for USB VBUS. - -Refer to phy/phy-bindings.txt for the generic PHY binding properties. - -Example: - soc-glue@5f800000 { - ... - usb-phy { - compatible = "socionext,uniphier-ld11-usb2-phy"; - usb_phy0: phy@0 { - reg = <0>; - #phy-cells = <0>; - }; - ... - }; - }; - - usb@5a800100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - ... - phy-names = "usb"; - phys = <&usb_phy0>; - }; -- 2.7.4
