From: Baolin Wang <baolin.wang@xxxxxxxxxx> Add the Spreadtrum mailbox documentation. Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Baolin Wang <baolin.wang@xxxxxxxxxx> Signed-off-by: Baolin Wang <baolin.wang7@xxxxxxxxx> --- Changes from v3: - None. Changes from v2: - Add reviewed tag from Rob. - Remove redundant 'minItems'. Changes from v1: - Add 'additionalProperties'. - Split description for each entry. --- .../bindings/mailbox/sprd-mailbox.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml new file mode 100644 index 000000000000..0f7451b42d7e --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Spreadtrum mailbox controller bindings + +maintainers: + - Orson Zhai <orsonzhai@xxxxxxxxx> + - Baolin Wang <baolin.wang7@xxxxxxxxx> + - Chunyan Zhang <zhang.lyra@xxxxxxxxx> + +properties: + compatible: + enum: + - sprd,sc9860-mailbox + + reg: + items: + - description: inbox registers' base address + - description: outbox registers' base address + + interrupts: + items: + - description: inbox interrupt + - description: outbox interrupt + + clocks: + maxItems: 1 + + clock-names: + items: + - const: enable + + "#mbox-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + mailbox: mailbox@400a0000 { + compatible = "sprd,sc9860-mailbox"; + reg = <0 0x400a0000 0 0x8000>, <0 0x400a8000 0 0x8000>; + #mbox-cells = <1>; + clock-names = "enable"; + clocks = <&aon_gate 53>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + }; +... -- 2.17.1
