Re: [PATCHv2] arm: dts: am33xx-clock: Fix ehrpwm tbclk data.

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On 04/29/2014 03:48 PM, Tero Kristo wrote:
On 04/29/2014 11:34 AM, Sourav Poddar wrote:
tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.

Signed-off-by: Sourav Poddar <sourav.poddar@xxxxxx>

Looks good to me so:

Acked-by: Tero Kristo <t-kristo@xxxxxx>

Also, queued for 3.15-rc/clk-dt.

-Tero


---
v1->v2:
change compatible string according to mainline.
  arch/arm/boot/dts/am33xx-clocks.dtsi |   30
++++++------------------------
  1 file changed, 6 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi
b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 9ccfe50..712edce 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -96,47 +96,29 @@
          clock-div = <1>;
      };

-    ehrpwm0_gate_tbclk: ehrpwm0_gate_tbclk {
+    ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
          #clock-cells = <0>;
-        compatible = "ti,composite-no-wait-gate-clock";
+        compatible = "ti,gate-clock";
          clocks = <&dpll_per_m2_ck>;
          ti,bit-shift = <0>;
          reg = <0x0664>;
      };

-    ehrpwm0_tbclk: ehrpwm0_tbclk {
-        #clock-cells = <0>;
-        compatible = "ti,composite-clock";
-        clocks = <&ehrpwm0_gate_tbclk>;
-    };
-
-    ehrpwm1_gate_tbclk: ehrpwm1_gate_tbclk {
+    ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
          #clock-cells = <0>;
-        compatible = "ti,composite-no-wait-gate-clock";
+        compatible = "ti,gate-clock";
          clocks = <&dpll_per_m2_ck>;
          ti,bit-shift = <1>;
          reg = <0x0664>;
      };

-    ehrpwm1_tbclk: ehrpwm1_tbclk {
-        #clock-cells = <0>;
-        compatible = "ti,composite-clock";
-        clocks = <&ehrpwm1_gate_tbclk>;
-    };
-
-    ehrpwm2_gate_tbclk: ehrpwm2_gate_tbclk {
+    ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
          #clock-cells = <0>;
-        compatible = "ti,composite-no-wait-gate-clock";
+        compatible = "ti,gate-clock";
          clocks = <&dpll_per_m2_ck>;
          ti,bit-shift = <2>;
          reg = <0x0664>;
      };
-
-    ehrpwm2_tbclk: ehrpwm2_tbclk {
-        #clock-cells = <0>;
-        compatible = "ti,composite-clock";
-        clocks = <&ehrpwm2_gate_tbclk>;
-    };
  };
  &prcm_clocks {
      clk_32768_ck: clk_32768_ck {



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