his patchset adds the Mediatek MMDVFS(Multimedia Dynamic Voltage and Frequency Scaling) driver. The multimedia HWs, such as display, camera, share the same power supplier, and on some platforms, they share the same clock MUX. If each HW needs different clock frequency at the same time, the clock MUX must be set to the clock source which can meet the highest required clock frequency. Following implementation is used to achieve the goal. There are OPP tables for all the clock MUXs for MM HWs defined in DTS, ant these OPP tables have the same number of levels. The MMDVFS registers the regulator callback and the MM HWs can get available clock frequencies from OPP tables and set corresponding voltage by regulor API. The MMDVFS's callback will be triggered if the voltage is changed and this voltage represents the highest required OPP level. The MMDVFS has a mapping table: which clock source should be set to each clock MUX for every OPP level. So all the clock MUXs will be set to the clock sources according to the current OPP level in the MMDVFS's regulator callback. Anthony Huang (2): dt-bindings: soc: mediatek: Add document for mmdvfs driver soc: mediatek: Add mtk-mmdvfs driver .../devicetree/bindings/soc/mediatek/mmdvfs.yaml | 198 +++++++++++++ drivers/soc/mediatek/Kconfig | 9 + drivers/soc/mediatek/Makefile | 1 + drivers/soc/mediatek/mtk-mmdvfs.c | 312 ++++++++++++++++++++ 4 files changed, 520 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mmdvfs.yaml create mode 100644 drivers/soc/mediatek/mtk-mmdvfs.c -- 1.7.9.5
