Hi Robin, Heiko, If the Rockchip DT maintainers(= Heiko) agree that the new line for the 'bus-width' properties is that it should be placed in dtsi I'll produce a version 2. Please advise what should be done with the other Rockchip SoCs. Change them too? Johan. On 4/14/20 12:02 PM, Robin Murphy wrote: > On 2020-04-13 8:36 pm, Johan Jonker wrote: >> The 'bus-width' property for mmc nodes is defined both in >> 'rk3308.dtsi' and 'rk3308-roc-cc.dts'. >> In line with the other Rockchip SoCs define that in a user dts only, >> so remove all entries from mmc nodes in 'rk3308.dtsi'. > > Judging by the pinctrl entries, these represent the number of pins > provided by the SoC itself. Obviously boards need to override that if > for some reason they don't wire up all the available data lines, but it > seems backwards to have every board restate the SoC's default value. > > In fact, having brought it up, for this particular case the pinctrl > setting is inherently related to the bus width, so having one without > the other in either place doesn't smell right. > > Robin. > >> Signed-off-by: Johan Jonker <jbx6244@xxxxxxxxx> >> --- >> arch/arm64/boot/dts/rockchip/rk3308.dtsi | 3 --- >> 1 file changed, 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi >> b/arch/arm64/boot/dts/rockchip/rk3308.dtsi >> index a9b98555d..130771ede 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi >> +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi >> @@ -587,7 +587,6 @@ >> compatible = "rockchip,rk3308-dw-mshc", >> "rockchip,rk3288-dw-mshc"; >> reg = <0x0 0xff480000 0x0 0x4000>; >> interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; >> - bus-width = <4>; >> clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, >> <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> @@ -602,7 +601,6 @@ >> compatible = "rockchip,rk3308-dw-mshc", >> "rockchip,rk3288-dw-mshc"; >> reg = <0x0 0xff490000 0x0 0x4000>; >> interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; >> - bus-width = <8>; >> clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, >> <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >> @@ -615,7 +613,6 @@ >> compatible = "rockchip,rk3308-dw-mshc", >> "rockchip,rk3288-dw-mshc"; >> reg = <0x0 0xff4a0000 0x0 0x4000>; >> interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; >> - bus-width = <4>; >> clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, >> <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; >> clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; >>
