On Tue, Mar 17, 2020 at 10:41:13AM +0100, Michael Tretter wrote:
> The xlnx,vcu binding comprises two adjacent register banks:
>
> The first register bank ("vcu_slcr") contains registers for setting the
> clocks of the vcu and controlling the performance monitors. The second
> bank ("logicoreip") contains the configuration settings of the video codec
> unit, which are set before synthesizing the bitstream.
>
> Drivers that drive the actual video codec unit need to to read the
> registers from the logicoreip register bank for configuring the vcu
> firmware.
>
> As logicoreip is a too generic name for this register bank, use
> "vcu-settings" as a binding name, because the register bank basically
> provides the configuration settings of the VCU.
>
> Therefore, add the vcu-settings binding to provide a syscon interface
> for other drivers to read these registers.
>
> The alternative would have been to merge the two register banks of the
> xlnx,vcu binding into one register bank and make xlnx,vcu provide a
> syscon interface, but that would lead to more incompatibility than
> making second register bank of xlnx,vcu optional.
>
> Signed-off-by: Michael Tretter <m.tretter@xxxxxxxxxxxxxx>
> ---
> .../soc/xilinx/xlnx,vcu-settings.yaml | 45 +++++++++++++++++++
> .../bindings/soc/xilinx/xlnx,vcu.txt | 9 +---
> 2 files changed, 47 insertions(+), 7 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml b/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
> new file mode 100644
> index 000000000000..a38ab180854e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/xilinx/xlnx,vcu-settings.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx VCU Settings
> +
> +maintainers:
> + - Michael Tretter <kernel@xxxxxxxxxxxxxx>
> +
> +# Custom select to avoid matching all nodes with 'syscon'
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - xlnx,vcu-settings
> + required:
> + - compatible
You can drop this. The tooling now avoids this issue for 'syscon'.
> +
> +
> +description: |
> + The Xilinx VCU Settings provides information about the configuration of the
> + video codec unit.
> +
> +properties:
> + compatible:
> + items:
> + - const: xlnx,vcu-settings
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + xlnx_vcu: vcu@a0041000 {
> + compatible = "xlnx,vcu-settings", "syscon";
> + reg = <0x0 0xa0041000 0x0 0x1000>;
> + };
> diff --git a/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt b/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt
> index 6786d6715df0..2417b13ba468 100644
> --- a/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt
> +++ b/Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu.txt
> @@ -12,10 +12,7 @@ Required properties:
> - compatible: shall be one of:
> "xlnx,vcu"
> "xlnx,vcu-logicoreip-1.0"
> -- reg, reg-names: There are two sets of registers need to provide.
> - 1. vcu slcr
> - 2. Logicore
> - reg-names should contain name for the each register sequence.
> +- reg : The base offset and size of the VCU_PL_SLCR register space.
> - clocks: phandle for aclk and pll_ref clocksource
> - clock-names: The identification string, "aclk", is always required for
> the axi clock. "pll_ref" is required for pll.
> @@ -23,9 +20,7 @@ Example:
>
> xlnx_vcu: vcu@a0040000 {
> compatible = "xlnx,vcu-logicoreip-1.0";
> - reg = <0x0 0xa0040000 0x0 0x1000>,
> - <0x0 0xa0041000 0x0 0x1000>;
> - reg-names = "vcu_slcr", "logicore";
> + reg = <0x0 0xa0040000 0x0 0x1000>;
> clocks = <&si570_1>, <&clkc 71>;
> clock-names = "pll_ref", "aclk";
> };
> --
> 2.20.1
>
