From: Stefan Eichenberger <eichest@xxxxxxxxx>
According to the ClearFog-GT-8K-rev-1_1-Simplified-Schematic the reset
pin for the gigabit phy is MPP62 and not MPP43.
Signed-off-by: Stefan Eichenberger <eichest@xxxxxxxxx>
---
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index b90d78a5724b..d371d938b41e 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -144,7 +144,6 @@
* [35-38] CP0 I2C1 and I2C0
* [39] GPIO reset button
* [40,41] LED0 and LED1
- * [43] 1512 phy reset
* [47] USB VBUS EN (active low)
* [48] FAN PWM
* [49] SFP+ present signal
@@ -155,6 +154,7 @@
* [54] NFC reset
* [55] Micro SD card detect
* [56-61] Micro SD
+ * [62] 1512 phy reset
*/
cp0_pci0_reset_pins: pci0-reset-pins {
@@ -197,11 +197,6 @@
marvell,function = "gpio";
};
- cp0_copper_eth_phy_reset: copper-eth-phy-reset {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
-
cp0_xhci_vbus_pins: xhci0-vbus-pins {
marvell,pins = "mpp47";
marvell,function = "gpio";
@@ -232,6 +227,11 @@
"mpp60", "mpp61";
marvell,function = "sdio";
};
+
+ cp0_copper_eth_phy_reset: copper-eth-phy-reset {
+ marvell,pins = "mpp62";
+ marvell,function = "gpio";
+ };
};
&cp0_pcie0 {
@@ -365,7 +365,7 @@
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_copper_eth_phy_reset>;
- reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&cp0_gpio2 30 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
--
2.20.1
