Add support for backplane kr phy connection types currently available (10gbase-kr, 40gbase-kr4) and the required phylink updates (cover all the cases for KR modes which are clause 45 compatible to correctly assign phy_interface and phylink#supported) Signed-off-by: Florinel Iordache <florinel.iordache@xxxxxxx> --- drivers/net/phy/phylink.c | 15 ++++++++++++--- include/linux/phy.h | 6 +++++- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index fed0c59..db1bb87 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -4,6 +4,7 @@ * technologies such as SFP cages where the PHY is hot-pluggable. * * Copyright (C) 2015 Russell King + * Copyright 2020 NXP */ #include <linux/ethtool.h> #include <linux/export.h> @@ -303,7 +304,6 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) break; case PHY_INTERFACE_MODE_USXGMII: - case PHY_INTERFACE_MODE_10GKR: case PHY_INTERFACE_MODE_10GBASER: phylink_set(pl->supported, 10baseT_Half); phylink_set(pl->supported, 10baseT_Full); @@ -317,7 +317,6 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) phylink_set(pl->supported, 2500baseX_Full); phylink_set(pl->supported, 5000baseT_Full); phylink_set(pl->supported, 10000baseT_Full); - phylink_set(pl->supported, 10000baseKR_Full); phylink_set(pl->supported, 10000baseKX4_Full); phylink_set(pl->supported, 10000baseCR_Full); phylink_set(pl->supported, 10000baseSR_Full); @@ -326,6 +325,14 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) phylink_set(pl->supported, 10000baseER_Full); break; + case PHY_INTERFACE_MODE_10GKR: + phylink_set(pl->supported, 10000baseKR_Full); + break; + + case PHY_INTERFACE_MODE_40GKR4: + phylink_set(pl->supported, 40000baseKR4_Full); + break; + case PHY_INTERFACE_MODE_XLGMII: phylink_set(pl->supported, 25000baseCR_Full); phylink_set(pl->supported, 25000baseKR_Full); @@ -823,7 +830,9 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, if (phy->is_c45 && interface != PHY_INTERFACE_MODE_RXAUI && interface != PHY_INTERFACE_MODE_XAUI && - interface != PHY_INTERFACE_MODE_USXGMII) + interface != PHY_INTERFACE_MODE_USXGMII && + interface != PHY_INTERFACE_MODE_10GKR && + interface != PHY_INTERFACE_MODE_40GKR4) config.interface = PHY_INTERFACE_MODE_NA; else config.interface = interface; diff --git a/include/linux/phy.h b/include/linux/phy.h index 2432ca4..d7cca4b 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -6,6 +6,7 @@ * Author: Andy Fleming * * Copyright (c) 2004 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ #ifndef __PHY_H @@ -107,8 +108,9 @@ /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ PHY_INTERFACE_MODE_10GBASER, PHY_INTERFACE_MODE_USXGMII, - /* 10GBASE-KR - with Clause 73 AN */ + /* Backplane KR */ PHY_INTERFACE_MODE_10GKR, + PHY_INTERFACE_MODE_40GKR4, PHY_INTERFACE_MODE_MAX, } phy_interface_t; @@ -190,6 +192,8 @@ static inline const char *phy_modes(phy_interface_t interface) return "usxgmii"; case PHY_INTERFACE_MODE_10GKR: return "10gbase-kr"; + case PHY_INTERFACE_MODE_40GKR4: + return "40gbase-kr4"; default: return "unknown"; } -- 1.9.1
