To prevent CPU IRQ collide with PCH IRQ, we move down CPU IRQ BASE to 16. Co-developed-by: Huacai Chen <chenhc@xxxxxxxxxx> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> --- arch/mips/include/asm/mach-loongson64/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h index d41dc4a76e6d..0041bd490ab8 100644 --- a/arch/mips/include/asm/mach-loongson64/irq.h +++ b/arch/mips/include/asm/mach-loongson64/irq.h @@ -5,7 +5,7 @@ #include <boot_param.h> /* cpu core interrupt numbers */ -#define MIPS_CPU_IRQ_BASE 56 +#define MIPS_CPU_IRQ_BASE 16 #include <asm/mach-generic/irq.h> -- 2.26.0.rc2
