Hi Stephen,
On Sat, 21 Mar 2020 at 09:12, Stephen Boyd <sboyd@xxxxxxxxxx> wrote:
>
> Quoting Chunyan Zhang (2020-03-03 23:27:26)
> > From: Chunyan Zhang <chunyan.zhang@xxxxxxxxxx>
> >
> > add a new bindings to describe sc9863a clock compatible string.
> >
> > Signed-off-by: Chunyan Zhang <chunyan.zhang@xxxxxxxxxx>
> [...]
> > +examples:
> > + - |
> > + ap_clk: clock-controller@21500000 {
> > + compatible = "sprd,sc9863a-ap-clk";
> > + reg = <0 0x21500000 0 0x1000>;
> > + clocks = <&ext_26m>, <&ext_32k>;
> > + clock-names = "ext-26m", "ext-32k";
> > + #clock-cells = <1>;
> > + };
> > +
> > + - |
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + ap_ahb_regs: syscon@20e00000 {
> > + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
> > + reg = <0 0x20e00000 0 0x4000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0x20e00000 0x4000>;
> > +
> > + apahb_gate: apahb-gate@0 {
>
> Why do we need a node per "clk type" in the simple-mfd syscon? Can't we
> register clks from the driver that matches the parent node and have that
> driver know what sorts of clks are where? Sorry I haven't read the rest
> of the patch series and I'm not aware if this came up before. If so,
> please put details about this in the commit text.
Please see the change logs after v2 in cover-letter.
Rob suggested us to put some clocks under syscon nodes, since these
clocks have the same
physical address base with the syscon;
Thanks,
Chunyan
>
> > + compatible = "sprd,sc9863a-apahb-gate";
> > + reg = <0x0 0x1020>;
> > + #clock-cells = <1>;
