Hi Paul, > Am 11.03.2020 um 14:20 schrieb Paul Cercueil <paul@xxxxxxxxxxxxxxx>: > > Hi Nikolaus, > > > Le mer., mars 11, 2020 at 13:43, H. Nikolaus Schaller <hns@xxxxxxxxxxxxx> a écrit : >> Hi Paul, >>> The JZ4780's LCD controller is much newer than the JZ4740 one, so even if it works with the "ingenic,jz4740-lcd" compatible string, you want it as a fallback. >>> So this should be: compatible = "ingenic,jz4780-lcd", "ingenic,jz4740-lcd". >>> That means the YAML should be updated too. >> I have started to look into jz4780 HDMI setup again. >> Well, there is no driver compatible to "ingenic,jz4780-lcd" so far >> and it is questionalbe if we need a different one. >> I think we should rather make the driver also compatible >> than adding a fallback to ingenic,jz4740-lcdto the DTS. >> The reason why this is better even if both LCDC are almost >> compatible is that the jz4780 allows for much bigger displays >> and therefore should have its own jz_soc_info with 4k x 2k >> as maximum. > > Sure, feel free to extend the driver. > >> Next I tried to find out if the LCDC are really compatible. >> Well the jz4780 has two lcdc instances but they are separated >> by the reg addr. Next, there are unique features (like picture in >> picture with alpha blending) but those are probably disabled >> if not programmed from reset state. This may become a reason >> to separate or augment the driver for the jz4780 but at the >> moment we can ignore that. > > Two LCDC instances -> two lcd-controller@... nodes. It's that simple. Indeed :) > > The other features you listed are outside the LCDC, so outside the scope of this driver. Well, in the description they are mixed but I think we do not have to care about now. > >> There are also subtly different bit definitions and register >> widths (e.g. 24 bit in addition to 16/18 bit modes or more bits >> for the sync position) but it looks as if the ingenic_drm >> driver already handles this. >> Then I tried to read back the registers. Strangely they >> are all 0x00000000. So there is no programming of the >> lcd-controller in our DT setup with HDMI at all! > > How did you read them? I used devmem2 (may be an omap tool I have recompiled for MIPS - it uses /dev/mem). > Do it from the regmap: should be "cat /sys/kernel/debug/regmap/13050000.lcd-controller/registers" (not sure about the path) Well seems to give the same result: root@letux:~# cat /sys/kernel/debug/regmap/13050000.lcd-controller/registers 00: 00000000 04: 00000000 08: 00000000 0c: 00000000 10: 00000000 14: 00000000 18: 00000000 1c: 00000000 20: 00000000 24: 00000000 28: 00000000 2c: 00000000 30: 00000000 34: 00000000 38: 00000000 3c: 00000000 40: 00000000 44: 00000000 48: 00000000 4c: 00000000 50: 00000000 54: 00000000 58: 00000000 5c: 00000000 root@letux:~# > >> I also checked that ingenic_drm_probe() is called and >> returns successfully 0. It also reports that a /dev/fb >> has been created: >> [ 7.908830] ingenic-drm 13050000.lcd-controller: fb0: ingenic-drmdrmf frame buffer device >> But for example ingenic_drm_encoder_atomic_mode_set() is >> never called which should write some registers of the LCDC. >> I only did see some calls to ingenic_drm_encoder_atomic_check(). >> This of course explains why we have no HDMI signals despite >> proper HPD and a /dev/fb0. Because the LCDC is not being >> programmed. > > It won't be called until the HDMI driver says that the cable is plugged, and there's a client application (e.g. fbdev emulation) running. So the problem is most likely within the HDMI driver. Ok! The HDMI subsystem says (with some printk inserted) on cable unplug/replug: root@letux:~# [ 3894.370706] dw_hdmi_update_power [ 3894.373984] dw_hdmi_update_power: hdmi->force=0 [ 3894.378759] dw_hdmi_update_power: hdmi->disabled=0 [ 3894.383756] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.388947] dw_hdmi_update_power: hdmi->rxsense=1 [ 3894.393831] dw_hdmi_update_power: force=2 [ 3894.397895] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.403200] dw_hdmi_phy_update_hpd [ 3894.406784] dw_hdmi_update_power [ 3894.410054] dw_hdmi_update_power: hdmi->force=0 [ 3894.414766] dw_hdmi_update_power: hdmi->disabled=0 [ 3894.419611] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.424928] dw_hdmi_update_power: hdmi->rxsense=1 [ 3894.429699] dw_hdmi_update_power: force=2 [ 3894.433876] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.439068] dw_hdmi_phy_update_hpd [ 3894.452316] dw_hdmi_update_power [ 3894.455596] dw_hdmi_update_power: hdmi->force=0 [ 3894.460150] dw_hdmi_update_power: hdmi->disabled=0 [ 3894.464967] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.470131] dw_hdmi_update_power: hdmi->rxsense=1 [ 3894.475051] dw_hdmi_update_power: force=2 [ 3894.479111] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.484423] dw_hdmi_phy_update_hpd [ 3894.488007] dw_hdmi_update_power [ 3894.491278] dw_hdmi_update_power: hdmi->force=0 [ 3894.495982] dw_hdmi_update_power: hdmi->disabled=0 [ 3894.500823] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.506139] dw_hdmi_update_power: hdmi->rxsense=0 [ 3894.510895] dw_hdmi_update_power: force=1 [ 3894.515063] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3894.520252] dw_hdmi_poweroff [ 3894.523284] dw_hdmi_phy_disable [ 3894.526480] dw_hdmi_phy_power_off [ 3894.529823] dw_hdmi_phy_gen2_txpwron [ 3894.533567] dw-hdmi-jz4780 10180000.hdmi: PHY powered down in 0 iterations [ 3894.540496] dw_hdmi_phy_gen2_pddq [ 3894.543966] dw_hdmi_phy_update_hpd [ 3894.547435] dw-hdmi-jz4780 10180000.hdmi: EVENT=plugout [ 3897.079560] dw_hdmi_update_power [ 3897.082840] dw_hdmi_update_power: hdmi->force=0 [ 3897.087394] dw_hdmi_update_power: hdmi->disabled=0 [ 3897.092207] dw_hdmi_update_power: hdmi->bridge_is_on=0 [ 3897.097370] dw_hdmi_update_power: hdmi->rxsense=1 [ 3897.102316] dw_hdmi_update_power: force=2 [ 3897.106380] dw_hdmi_update_power: hdmi->bridge_is_on=0 [ 3897.111667] dw_hdmi_poweron [ 3897.114518] dw_hdmi_setup [ 3897.117163] hdmi_disable_overflow_interrupts [ 3897.121478] dw-hdmi-jz4780 10180000.hdmi: Non-CEA mode used in HDMI [ 3897.127930] hdmi_av_composer [ 3897.130848] dw-hdmi-jz4780 10180000.hdmi: final pixclk = 0 [ 3897.136506] dw_hdmi_phy_init [ 3897.139440] dw_hdmi_phy_sel_data_en_pol [ 3897.143428] dw_hdmi_phy_sel_interface_control [ 3897.147840] hdmi_phy_configure [ 3897.150922] dw_hdmi_phy_power_off [ 3897.154415] dw_hdmi_phy_gen2_txpwron [ 3897.158043] dw-hdmi-jz4780 10180000.hdmi: PHY powered down in 0 iterations [ 3897.165094] dw_hdmi_phy_gen2_pddq [ 3897.168468] dw_hdmi_set_high_tmds_clock_ratio [ 3897.173002] hdmi_phy_configure_dwc_hdmi_3d_tx [ 3897.186578] dw_hdmi_phy_power_on [ 3897.189847] dw_hdmi_phy_gen2_txpwron [ 3897.193586] dw_hdmi_phy_gen2_pddq [ 3897.217640] dw-hdmi-jz4780 10180000.hdmi: PHY PLL locked 1 iterations [ 3897.224226] dw_hdmi_phy_sel_data_en_pol [ 3897.228107] dw_hdmi_phy_sel_interface_control [ 3897.232631] hdmi_phy_configure [ 3897.235739] dw_hdmi_phy_power_off [ 3897.239082] dw_hdmi_phy_gen2_txpwron [ 3897.242826] dw-hdmi-jz4780 10180000.hdmi: PHY powered down in 0 iterations [ 3897.249754] dw_hdmi_phy_gen2_pddq [ 3897.253239] dw_hdmi_set_high_tmds_clock_ratio [ 3897.257658] hdmi_phy_configure_dwc_hdmi_3d_tx [ 3897.271264] dw_hdmi_phy_power_on [ 3897.274659] dw_hdmi_phy_gen2_txpwron [ 3897.278292] dw_hdmi_phy_gen2_pddq [ 3897.283840] dw-hdmi-jz4780 10180000.hdmi: PHY PLL locked 1 iterations [ 3897.290346] dw_hdmi_enable_video_path [ 3897.294240] dw-hdmi-jz4780 10180000.hdmi: sink has audio support [ 3897.300324] dw-hdmi-jz4780 10180000.hdmi: dw_hdmi_setup HDMI mode [ 3897.306596] hdmi_config_AVI [ 3897.309467] hdmi_config_vendor_specific_infoframe [ 3897.314336] hdmi_config_drm_infoframe [ 3897.318096] hdmi_tx_hdcp_config [ 3897.321270] dw_hdmi_clear_overflow [ 3897.324831] dw_hdmi_phy_update_hpd [ 3897.328298] dw-hdmi-jz4780 10180000.hdmi: EVENT=plugin [ 3897.333704] dw_hdmi_update_power [ 3897.336990] dw_hdmi_update_power: hdmi->force=0 [ 3897.341551] dw_hdmi_update_power: hdmi->disabled=0 [ 3897.346528] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3897.351858] dw_hdmi_update_power: hdmi->rxsense=1 [ 3897.356615] dw_hdmi_update_power: force=2 [ 3897.360655] dw_hdmi_update_power: hdmi->bridge_is_on=1 [ 3897.365980] dw_hdmi_phy_update_hpd So the plugout/plugin events are not processed further. One thing looks strange: [ 3897.127930] hdmi_av_composer [ 3897.130848] dw-hdmi-jz4780 10180000.hdmi: final pixclk = 0 But I have no idea if this is the reason or the consequence of the uninitialized lcdc. So we need some DRM specialist to take a look on it. BR and thanks, Nikolaus
