From: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> >From Linux point of view Baikal-T1 Boot Controller is a multi-function memory-mapped device, which provides an access to three memory-mapped ROMs and to an embedded DW APB SSI-based SPI controller. It's refelected in the be,bt1-boot-ctl bindings file. So the device must be added to the system dts-file as an ordinary memory-mapped device node with a single clocks source phandle declared and with also memory-mapped spi/mtd-rom sub-devices. Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Signed-off-by: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> Cc: Paul Burton <paulburton@xxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> --- .../bindings/mfd/be,bt1-boot-ctl.yaml | 89 +++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/be,bt1-boot-ctl.yaml diff --git a/Documentation/devicetree/bindings/mfd/be,bt1-boot-ctl.yaml b/Documentation/devicetree/bindings/mfd/be,bt1-boot-ctl.yaml new file mode 100644 index 000000000000..bb95a236d231 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/be,bt1-boot-ctl.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/be,bt1-boot-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Baikal-T1 Boot Controller bindings + +description: | + Baikal-T1 SoC Boot Controller is a vendor-specific module responsible + for the CPU primary booting up. Mainly it is a special block, which + task is to properly start the SoC and then pass the control to the CPU + cores. It also provides a MMIO-based interface to a bootable memory + devices with an executable code pre-installed for the system to + start. The controller includes the next functions: + 1) Pysically mapped ROMs to transparently access a SoC' internal firmware + and SPI Boot flash. + 2) DW APB SSI-based embedded SPI controller. + +maintainers: + - Serge Semin <fancer.lancer@xxxxxxxxx> + +properties: + compatible: + const: be,bt1-boot-ctl + + reg: + maxItems: 1 + + clocks: + description: APB interface clock source. + maxItems: 1 + + clock-names: + items: + - const: pclk + + "#address-cells": true + + "#size-cells": true + + ranges: true + +patternProperties: + "^(rom|spi)@[0-9a-fA-F]+$": + type: object + + properties: + compatible: + anyOf: + - description: Memory mapped boot ROMs. + items: + - enum: + - be,bt1-int-rom + - be,bt1-ssi-rom + - be,bt1-boot-rom + - const: mtd-rom + - description: DW APB SSI-based boot SPI controller. + const: be,bt1-boot-ssi + + required: + - compatible + +additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/bt1-ccu.h> + + boot: boot@1F040000 { + compatible = "be,bt1-boot-ctl"; + reg = <0x1F040000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&ccu_sys CCU_SYS_APB_CLK>; + clock-names = "pclk"; + }; +... -- 2.25.1
