On 2020-02-25 14:14, Matthew Barth wrote:
All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
GPIO.
Signed-off-by: Matthew Barth <msbarth@xxxxxxxxxxxxx>
---
v2: Added leds-pca955x.h include
Added upstream to patch
---
Reviewed-by: Brandon Wyman <bjwyman@xxxxxxxxx>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index c63cefce636d..d9fa9fd48058 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -4,6 +4,7 @@
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Rainier";
@@ -351,66 +352,82 @@
gpio@0 {
reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
};
};
