>>> + rd_adj = clk_rate / 153846154;
>>> + rd_strobe = clk_rate / 28571429 - 5 - rd_adj + 1;
>>> +
>>> + if (rd_adj > BIT(4) - 1 || rd_strobe > BIT(4) - 1) {
>>
>> Just use 0xF or GENMASK(3, 0) instead of BIT(4) - 1
>
> Or would rd_adj >= BIT(4) be better since this is not used as a mask?
> This would also correspond to that the register is 4 bits wide.
I just recognized that we already have these constants defined:
So I'll add
if (rd_adj > EFUCFG_RD_ADJ_MASK || rd_strobe > EFUCFG_RD_STR_MASK) {
to v7.
BR,
Nikolaus
