On 17/11/19, Dong Aisheng wrote: > The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53 > proccessor with powerful graphic and multimedia features. > This patch adds i.MX8QuadMax MEK board support. > > Note that MX8QM needs a special workaround for TLB flush due to a SoC > errata, otherwise there may be random crash if enable both clusters of > A72 and A53. As the errata workaround is still not in mainline, so we > disable A72 cluster first for MX8QM MEK. can you point me to the errata workaround patch for the MMU/TLB Coherency issue? I observe the same issue here with another imx8qm board. Best Regards, Oliver
