On Mon, Feb 17, 2020 at 04:45:18PM +0530, Kishon Vijay Abraham I wrote: > Add PCIe Host (RC) and Endpoint (EP) device tree schema for Cadence > PCIe core library. Platforms using Cadence PCIe core can include the > schemas added here in the platform specific schemas. > > Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx> > --- > .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 22 +++++++++ > .../bindings/pci/cdns-pcie-host.yaml | 27 +++++++++++ > .../devicetree/bindings/pci/cdns-pcie.yaml | 45 +++++++++++++++++++ > 3 files changed, 94 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml > create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml > create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml > > diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml > new file mode 100644 > index 000000000000..b22d54605009 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml > @@ -0,0 +1,22 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Cadence PCIe Endpoint > + > +maintainers: > + - Tom Joseph <tjoseph@xxxxxxxxxxx> > + > +allOf: > + - $ref: "cdns-pcie.yaml#" > + > +properties: > + max-functions: > + description: Maximum number of functions that can be configured > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint8 > + minimum: 1 > + default: 1 > + maximum: 256 Create a pcie-ep.yaml and put this there as every endpoint binding seems to use this and I'm sure there's more properties to come. Also, the max can only be 255. > diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml > new file mode 100644 > index 000000000000..ab6e43b636ec > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml > @@ -0,0 +1,27 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Cadence PCIe Host > + > +maintainers: > + - Tom Joseph <tjoseph@xxxxxxxxxxx> > + > +allOf: > + - $ref: "/schemas/pci/pci-bus.yaml#" > + - $ref: "cdns-pcie.yaml#" > + > +properties: > + cdns,no-bar-match-nbits: > + description: > + Set into the no BAR match register to configure the number of least > + significant bits kept during inbound (PCIe -> AXI) address translations This should probably be deprecated IMO. This info should really be extracted from sizes in 'dma-ranges'. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 0 > + maximum: 64 > + default: 32 > + > + msi-parent: true > diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml > new file mode 100644 > index 000000000000..fd690b062de1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Cadence PCIe Core > + > +maintainers: > + - Tom Joseph <tjoseph@xxxxxxxxxxx> > + > +properties: > + max-link-speed: > + description: maximum link speed > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 4 Standard property in pci-bus.yaml, no need to define it again. > + > + num-lanes: > + description: maximum number of lanes > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 16 This should be added to pci-bus.yaml. Assume here it is. > + > + cdns,max-outbound-regions: > + description: maximum number of outbound regions > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 32 > + default: 32 This too should be deprecated IMO. It is nothing more than error checking number of 'ranges' entries. But deprecating should be a follow-up. > + > + phys: > + description: > + One per lane if more than one in the list. If only one PHY listed it must > + manage all lanes. > + minItems: 1 > + maxItems: 16 > + > + phy-names: > + items: > + - const: pcie-phy > + # FIXME: names when more than 1 > -- > 2.17.1 >
