Hi Nikolaus,
On 2020年02月19日 13:48, H. Nikolaus Schaller wrote:
Am 18.02.2020 um 22:26 schrieb Rob Herring <robh@xxxxxxxxxx>:
On Mon, Feb 17, 2020 at 05:55:26PM +0100, H. Nikolaus Schaller wrote:
From: PrasannaKumar Muralidharan <prasannatsmkumar@xxxxxxxxx>
This patch brings support for the JZ4780 efuse. Currently it only expose
a read only access to the entire 8K bits efuse memory.
Tested-by: Mathieu Malaterre <malat@xxxxxxxxxx>
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@xxxxxxxxx>
Signed-off-by: Mathieu Malaterre <malat@xxxxxxxxxx>
Signed-off-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx>
---
.../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
Please convert to a DT schema.
Is there someone of you who can help to do that?
DT schemas are still like a Chinese dialect for me (i.e. I can decipher with help but neither speak nor write).
BR and thanks,
Nikolaus
I am also suffering from this, and I am going to ask Paul for advice.
diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
new file mode 100644
index 000000000000..339e74daa9a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
@@ -0,0 +1,17 @@
+Ingenic JZ EFUSE driver bindings
+
+Required properties:
+- "compatible" Must be set to "ingenic,jz4780-efuse"
+- "reg" Register location and length
+- "clocks" Handle for the ahb clock for the efuse.
+- "clock-names" Must be "bus_clk"
'clk' is redundant. How about 'ahb'?
How about replace "bus_clk" with "efuse"? Other SoCs (like T21, X1000,
X1500, X1830, X2000) has a dedicated bit in the CLKGR register to
control the EFUSE clock.
A corresponding "XXX_CLK_EFUSE" is provided in the "xxx-cgu.c" driver.
Thanks and best regards!
+
+Example:
+
+efuse: efuse@134100d0 {
+ compatible = "ingenic,jz4780-efuse";
+ reg = <0x134100d0 0x2c>;
+
+ clocks = <&cgu JZ4780_CLK_AHB2>;
+ clock-names = "bus_clk";
+};
--
2.23.0
