On Sat, 15 Feb 2020 01:27:41 +0800, =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= wrote: > The SSI clock of X1000 not like JZ4770 and JZ4780, they are not > directly derived from the output of SSIPLL, but from the clock > obtained by dividing the frequency by 2. "X1000_CLK_SSIPLL_DIV2" > is added for this purpose, it must between "X1000_CLK_SSIPLL" > and "X1000_CLK_SSIMUX", otherwise an error will occurs when > initializing the clock. These ABIs are only used for X1000, and > I'm sure that no other devicetree out there is using these ABIs, > so we should be able to reorder them. > > Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@xxxxxxxxxxxxxx> > --- > > Notes: > v5: > New patch. > > include/dt-bindings/clock/x1000-cgu.h | 58 ++++++++++++++++++----------------- > 1 file changed, 30 insertions(+), 28 deletions(-) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
