On Mon, Feb 17, 2020 at 04:44:14PM +0200, Vladimir Oltean wrote:
> From: Claudiu Manoil <claudiu.manoil@xxxxxxx>
>
> Link the switch PHY nodes to the central MDIO controller PCIe endpoint
> node on LS1028A (implemented as PF3) so that PHYs are accessible via
> MDIO.
>
> Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514
> quad PHY is capable of in-band-status.
>
> The PHYs are used in poll mode due to an issue with the interrupt line
> on current revisions of the LS1028A-RDB board.
>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@xxxxxxx>
> Signed-off-by: Alex Marginean <alexandru.marginean@xxxxxxx>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@xxxxxxx>
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew
