Introduce SMP support for CI20 (based on JZ4780) v5.

Subject: Introduce SMP support for CI20 (based on JZ4780) v5.
From: 周琰杰 (Zhou Yanjie) <zhouyanjie@xxxxxxxxxxxxxx>
Date: Sun, 16 Feb 2020 02:55:24 +0800
Cc: linux-clk@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, paul@xxxxxxxxxxxxxxx, mturquette@xxxxxxxxxxxx, sboyd@xxxxxxxxxx, robh+dt@xxxxxxxxxx, mark.rutland@xxxxxxx, ralf@xxxxxxxxxxxxxx, paulburton@xxxxxxxxxx, jiaxun.yang@xxxxxxxxxxx, chenhc@xxxxxxxxxx, allison@xxxxxxxxxxx, tglx@xxxxxxxxxxxxx, daniel.lezcano@xxxxxxxxxx, geert+renesas@xxxxxxxxx, krzk@xxxxxxxxxx, keescook@xxxxxxxxxxxx, ebiederm@xxxxxxxxxxxx, miquel.raynal@xxxxxxxxxxx, paul@xxxxxxxxxxxxx, hns@xxxxxxxxxxxxx, mips-creator-ci20-dev@xxxxxxxxxxxxxxxx

Introduce SMP support for MIPS Creator CI20, which is
based on Ingenic JZ4780 SoC.

Follow-Ups:
- [PATCH v5 0/7] Introduce SMP support for JZ4780.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 1/7] clk: JZ4780: Add function for enable the second core.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 2/7] MIPS: JZ4780: Introduce SMP support.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 4/7] clocksource: Ingenic: Add high resolution timer support for SMP.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 5/7] dt-bindings: MIPS: Document Ingenic SoCs binding.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 7/7] MIPS: CI20: Update defconfig to support SMP.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 6/7] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs.
  - From: 周琰杰 (Zhou Yanjie)
- [PATCH v5 3/7] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
  - From: 周琰杰 (Zhou Yanjie)