On Tue, Feb 11, 2020 at 1:38 AM Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> wrote: > > Hello George, > > On Mon, Feb 10, 2020 at 05:03:14PM -0600, George Hilliard wrote: > > On Mon, Feb 10, 2020 at 2:50 PM Uwe Kleine-König > > <u.kleine-koenig@xxxxxxxxxxxxxx> wrote: > > > On Mon, Feb 10, 2020 at 01:29:49PM -0600, George Hilliard wrote: > > > > @@ -1390,6 +1392,8 @@ static int imx_uart_startup(struct uart_port *port) > > > > ucr4 = imx_uart_readl(sport, UCR4) & ~UCR4_OREN; > > > > if (!sport->dma_is_enabled) > > > > ucr4 |= UCR4_OREN; > > > > + if (sport->inverted_rx) > > > > + ucr4 |= UCR4_INVR; > > > > > > You fail to clear this bit if .inverted_rx is false. > > > > I believe this is taken care of by the SRST asserted slightly above > > this - UCR* is reset by this. > > The i.MX6 manual states: Reset the transmit and receive state machines, > all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC, URXD, UTXD and > UTS[6-3]. UCR* isn't mentioned here. So please at least confirm your > belief experimentally. Oh, I see now - I misread "S" vs "C". You are correct; I will send v3 with both changes. Even with experimental evidence, there's no guarantee made by NXP, so I'll handle it. Thanks, George
