Signed-off-by: Oliver Graute <oliver.graute@xxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index fa827ed04e09..5d96be5fec1b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -140,6 +140,29 @@
method = "smc";
};
+ sata: sata@5f020000 {
+ compatible = "fsl,imx8qm-ahci";
+ reg = <0x0 0x5f020000 0x0 0x10000>, /* Controller reg */
+ <0x0 0x5f1a0000 0x0 0x10000>; /* PHY reg */
+ reg-names = "ctl", "phy";
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+/*
+ clocks = <&clk IMX8QM_HSIO_SATA_CLK>,
+ <&clk IMX8QM_HSIO_PHY_X1_PCLK>,
+ <&clk IMX8QM_HSIO_SATA_EPCS_TX_CLK>,
+ <&clk IMX8QM_HSIO_SATA_EPCS_RX_CLK>,
+ <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>,
+ <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>,
+ <&clk IMX8QM_HSIO_PHY_X1_APB_CLK>;
+ clock-names = "sata", "sata_ref", "epcs_tx", "epcs_rx",
+ "phy_pclk0", "phy_pclk1", "phy_apbclk";
+*/
+ hsio = <&hsio>;
+ //power-domains = <&pd_sata0>;
+ iommus = <&smmu 0x13 0x7f80>;
+ status = "disabled";
+ };
+
smmu: iommu@51400000 {
compatible = "arm,mmu-500";
interrupt-parent = <&gic>;
--
2.17.1
