On Sun, Feb 02, 2020 at 01:18:26PM -0800, Florian Fainelli wrote:
> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
> index c23c24ff7575..6f56a623c1cd 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.yaml
> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
> @@ -272,6 +272,22 @@ properties:
> While optional, it is the preferred way to get access to
> the cpu-core power-domains.
>
> + secondary-boot-reg:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description: |
> + Required for systems that have an "enable-method" property value of
> + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
> +
> + This includes the following SoCs: |
> + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550
> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
> +
> + The secondary-boot-reg property is a u32 value that specifies the
> + physical address of the register used to request the ROM holding pen
> + code release a secondary CPU. The value written to the register is
> + formed by encoding the target CPU id into the low bits of the
> + physical start address it should jump to.
> +
You can make the requirement explicit (and enforced by the schemas) using:
if:
properties:
enable-method:
contains:
enum:
- brcm,bcm11351-cpu-method
- brcm,bcm23550
- brcm,bcm-nsp-smp
then:
required:
- secondary-boot-reg
Maxime
