On Wed, Jan 22, 2020 at 11:54:59AM +0100, Yuti Amonkar wrote: > Document the bindings used for the Cadence MHDP DPI/DP bridge in > yaml format. > > Signed-off-by: Yuti Amonkar <yamonkar@xxxxxxxxxxx> > --- > .../bindings/display/bridge/cdns,mhdp.yaml | 131 +++++++++++++++++++++ > 1 file changed, 131 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml > > diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml > new file mode 100644 > index 0000000..696418a > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml > @@ -0,0 +1,131 @@ Missing SPDX tag. Dual license please. > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Cadence MHDP bridge > + > +maintainers: > + - Swapnil Jakhade <sjakhade@xxxxxxxxxxx> > + - Yuti Amonkar <yamonkar@xxxxxxxxxxx> > + > +properties: > + compatible: > + enum: > + - cdns,mhdp8546 > + - ti,j721e-mhdp8546 > + > + reg: > + minItems: 1 > + maxItems: 2 > + items: > + - description: > + Register block of mhdptx apb registers upto PHY mapped area(AUX_CONFIG_P). > + The AUX and PMA registers are mapped to associated phy driver. > + - description: > + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. > + > + reg-names: > + minItems: 1 > + maxItems: 2 > + items: > + - const: mhdptx > + - const: j721e-intg > + > + clocks: > + maxItems: 1 > + description: > + DP bridge clock, it's used by the IP to know how to translate a number of > + clock cycles into a time (which is used to comply with DP standard timings > + and delays). > + > + phys: > + description: Phandle to the DisplyPort phy. > + > + phy-names: > + const: dpphy > + > + ports: > + type: object > + description: > + Ports as described in Documentation/devicetree/bindings/graph.txt > + > + properties: > + '#address-cells': Wrong indentation. > + const: 1 > + > + '#size-cells': > + const: 0 > + > + port@0: > + type: object > + description: > + input port representing the DP bridge input > + > + port@1: > + type: object > + description: > + output port representing the DP bridge output. > + > + required: > + - port@0 > + - port@1 > + - '#address-cells' > + - '#size-cells' > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: ti,j721e-mhdp8546 > + then: > + properties: > + reg: > + minItems: 2 > + maxItems: 2 > + reg-names: > + minItems: 2 > + maxItems: 2 As we've already defined the max, you can drop maxItems on these 2. With those 2 changes, Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
