On Wed, Jan 15, 2020 at 09:30:43AM +0800, Anson Huang wrote:
> Convert the i.MX8MQ pinctrl binding to DT schema format using json-schema
>
> Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> ---
> Changes since V2:
> - the lisence should be GPL-2.0.
> ---
> .../bindings/pinctrl/fsl,imx8mq-pinctrl.txt | 36 -----------
> .../bindings/pinctrl/fsl,imx8mq-pinctrl.yaml | 69 ++++++++++++++++++++++
> 2 files changed, 69 insertions(+), 36 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt
> deleted file mode 100644
> index 66de750..0000000
> --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -* Freescale IMX8MQ IOMUX Controller
> -
> -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
> -for common binding part and usage.
> -
> -Required properties:
> -- compatible: "fsl,imx8mq-iomuxc"
> -- reg: should contain the base physical address and size of the iomuxc
> - registers.
> -
> -Required properties in sub-nodes:
> -- fsl,pins: each entry consists of 6 integers and represents the mux and config
> - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
> - input_val> are specified using a PIN_FUNC_ID macro, which can be found in
> - imx8mq-pinfunc.h under device tree source folder. The last integer CONFIG is
> - the pad setting value like pull-up on this pin. Please refer to i.MX8M Quad
> - Reference Manual for detailed CONFIG settings.
> -
> -Examples:
> -
> -&uart1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart1>;
> -};
> -
> -iomuxc: pinctrl@30330000 {
> - compatible = "fsl,imx8mq-iomuxc";
> - reg = <0x0 0x30330000 0x0 0x10000>;
> -
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
> - MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
> - >;
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml
> new file mode 100644
> index 0000000..e010808
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale IMX8MQ IOMUX Controller
> +
> +maintainers:
> + - Anson Huang <Anson.Huang@xxxxxxx>
> +
> +description:
> + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
> + for common binding part and usage.
> +
> +properties:
> + compatible:
> + const: fsl,imx8mq-iomuxc
> +
> + reg:
> + maxItems: 1
> +
> +# Client device subnode's properties
> +patternProperties:
> + 'grp$':
> + type: object
> + description:
> + Pinctrl node's client devices use subnodes for desired pin configuration.
> + Client device subnodes use below standard properties.
> +
> + properties:
> + fsl,pins:
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + each entry consists of 6 integers and represents the mux and config
> + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
> + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
> + be found in <arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h>. The last
> + integer CONFIG is the pad setting value like pull-up on this pin. Please
> + refer to i.MX8M Quad Reference Manual for detailed CONFIG settings.
Based on the description, I think this should be an uint32-matrix type
instead with a schema like this:
items:
items:
- description: mux_reg
- description: conf_reg
- description: input_reg
- description: mux_val
- description: input_val
- description: pad setting
(With better descriptions preferrably)
The dts files should then be bracketed accordingly.
> +
> + required:
> + - fsl,pins
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + # Pinmux controller node
> + - |
> + iomuxc: pinctrl@30330000 {
> + compatible = "fsl,imx8mq-iomuxc";
> + reg = <0x30330000 0x10000>;
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + 0x234 0x49C 0x4F4 0x0 0x0 0x49
> + 0x238 0x4A0 0x4F4 0x0 0x0 0x49
> + >;
> + };
> + };
> +
> +...
> --
> 2.7.4
>
