> + adi,1588-rx-sop-delays-cycles: > + allOf: > + - $ref: /schemas/types.yaml#definitions/uint8-array > + - items: > + - minItems: 3 > + maxItems: 3 > + description: | > + Enables Start Packet detection (SOP) for received IEEE 1588 time stamp > + controls, and configures the number of cycles (of the MII RX_CLK clock) > + to delay the indication of RX SOP frames for 10/100/1000 BASE-T links. > + The first element (in the array) configures the delay for 10BASE-T, > + the second for 100BASE-T, and the third for 1000BASE-T. Do you know the clock frequency? It would be much better to express this in ns, as with adi,1588-tx-sop-delays-ns. > @@ -62,5 +116,11 @@ examples: > reg = <1>; > > adi,fifo-depth-bits = <16>; > + > + adi,1588-rx-sop-delays-cycles = [ 00 00 00 ]; > + adi,1588-rx-sop-pin-name = "int_n"; > + > + adi,1588-tx-sop-delays-ns = [ 00 08 10 ]; 10 is not a multiple of 8! Andrew
