On 12/18/19 12:43 AM, Rob Herring wrote:
> On Fri, Dec 06, 2019 at 05:17:08PM +0100, Fabrice Gasnier wrote:
>> Convert the STM32 ADC binding to DT schema format using json-schema
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@xxxxxx>
>> ---
>> Note: this applies on top of IIO tree currently (iio-for-5.5c).
>>
>> Changes in V2:
>> - Take almost all of Rob suggestions (removed reg generic description,
>> added minItems, maxItems, st,max-clk-rate-hz range, drop some pipes,
>> simplify clock-names, remove unneeded allOfs)
>> - For now, keep all in one file despite there are lots of if/thens in the
>> bindings
>> ---
>> .../devicetree/bindings/iio/adc/st,stm32-adc.txt | 149 -------
>> .../devicetree/bindings/iio/adc/st,stm32-adc.yaml | 454 +++++++++++++++++++++
>> 2 files changed, 454 insertions(+), 149 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
>> create mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
>
>
[snip]
>> +
>> + st,adc-channels:
>> + description: |
>> + List of single-ended channels muxed for this ADC. It can have up to:
>> + - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
>> + - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
>> + stm32mp1.
>> + allOf:
>> + - $ref: /schemas/types.yaml#/definitions/uint32-array
>> +
[snip]
>> +
>> + allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: st,stm32f4-adc
>> +
>> + then:
>> + properties:
>> + reg:
>> + enum:
>> + - 0x0
>> + - 0x100
>> + - 0x200
>> +
>> + interrupts:
>> + minimum: 0
>> + maximum: 2
>> +
>> + assigned-resolution-bits:
>> + enum: [6, 8, 10, 12]
>> + default: 12
>> +
>> + st,adc-channels:
>> + minItems: 1
>> + maxItems: 16
>> + minimum: 0
>> + maximum: 15
>
> You are mixing array and scalar constraints here. You need:
>
> minItems: 1
> maxItems:16
> items:
> minimum: 0
> maximum: 15
>
> Update dtschema. It will now catch this. There's a few others too.
Hi Rob,
Sorry for the late reply. I updated dtschema. Now it catches it.
I've tried your suggestion, but when I test it, I don't get any error on
maxItems.
In the example: "st,adc-channels = <0>, <1>, ... more than 16 items;"
Is it possible I face some other issue with dtschema ?
I tried another way below... Not sure that's correct. But it catches
errors on maxItems:
st,adc-channels:
allOf:
- minItems: 1
maxItems: 16
items:
minimum: 0
maximum: 15
Error message is ... "is too long" with bad example above.
Please advise,
Regards,
Fabrice
>
>
>> +
>> + st,adc-diff-channels: false
>> +
>> + st,min-sample-time-nsecs:
>> + minItems: 1
>> + maxItems: 16
>> + minimum: 80
>> +
>> + required:
>> + - clocks
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - st,stm32h7-adc
>> + - st,stm32mp1-adc
>> +
>> + then:
>> + properties:
>> + reg:
>> + enum:
>> + - 0x0
>> + - 0x100
>> +
>> + interrupts:
>> + minimum: 0
>> + maximum: 1
>> +
>> + assigned-resolution-bits:
>> + enum: [8, 10, 12, 14, 16]
>> + default: 16
>> +
>> + st,adc-channels:
>> + minItems: 1
>> + maxItems: 20
>> + minimum: 0
>> + maximum: 19
>> +
>> + st,min-sample-time-nsecs:
>> + minItems: 1
>> + maxItems: 20
>> + minimum: 40
>> +
>> + additionalProperties: false
>> +
>> + anyOf:
>> + - required:
>> + - st,adc-channels
>> + - required:
>> + - st,adc-diff-channels
>> +
>> + required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - '#io-channel-cells'
>> +
>> +examples:
>> + - |
>> + // Example 1: with stm32f429
>> + adc123: adc@40012000 {
>> + compatible = "st,stm32f4-adc-core";
>> + reg = <0x40012000 0x400>;
>> + interrupts = <18>;
>> + clocks = <&rcc 0 168>;
>> + clock-names = "adc";
>> + st,max-clk-rate-hz = <36000000>;
>> + vdda-supply = <&vdda>;
>> + vref-supply = <&vref>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + adc@0 {
>> + compatible = "st,stm32f4-adc";
>> + #io-channel-cells = <1>;
>> + reg = <0x0>;
>> + clocks = <&rcc 0 168>;
>> + interrupt-parent = <&adc123>;
>> + interrupts = <0>;
>> + st,adc-channels = <8>;
>> + dmas = <&dma2 0 0 0x400 0x0>;
>> + dma-names = "rx";
>> + assigned-resolution-bits = <8>;
>> + };
>> + // ...
>> + // other adc child nodes follow...
>> + };
>> +
>> + - |
>> + // Example 2: with stm32mp157c to setup ADC1 with:
>> + // - channel 1 as single-ended
>> + // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/clock/stm32mp1-clks.h>
>> + adc12: adc@48003000 {
>> + compatible = "st,stm32mp1-adc-core";
>> + reg = <0x48003000 0x400>;
>> + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&rcc ADC12>, <&rcc ADC12_K>;
>> + clock-names = "bus", "adc";
>> + booster-supply = <&booster>;
>> + vdd-supply = <&vdd>;
>> + vdda-supply = <&vdda>;
>> + vref-supply = <&vref>;
>> + st,syscfg = <&syscfg>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + adc@0 {
>> + compatible = "st,stm32mp1-adc";
>> + #io-channel-cells = <1>;
>> + reg = <0x0>;
>> + interrupt-parent = <&adc12>;
>> + interrupts = <0>;
>> + st,adc-channels = <1>;
>> + st,adc-diff-channels = <2 6>, <3 7>;
>> + st,min-sample-time-nsecs = <5000>;
>> + dmas = <&dmamux1 9 0x400 0x05>;
>> + dma-names = "rx";
>> + };
>> + // ...
>> + // other adc child node follow...
>> + };
>> +
>> +...
>> --
>> 2.7.4
>>
