On 06/01/20 6:37 PM, Roger Quadros wrote: > > > On 06/01/2020 15:06, Roger Quadros wrote: >> Hi, >> >> On J721e platform, the 2 lanes of SERDES PHY are used to achieve >> USB Type-C plug flip support without any additional MUX component >> by using a lane swap feature. >> >> However, the driver needs to know the Type-C plug orientation before >> it can decide whether to swap the lanes or not. This is achieved via a >> GPIO named DIR. >> >> Another constraint is that the lane swap must happen only when the PHY >> is in inactive state. This is achieved by sampling the GPIO and >> programming the lane swap before bringing the PHY out of reset. >> >> This series adds support to read the GPIO and accordingly program >> the Lane swap for Type-C plug flip support. >> >> Series must be applied on top of >> https://patchwork.kernel.org/cover/11293671/ >> >> cheers, >> -roger >> >> Changelog: > v5 > - rebased on phy/next merged now, thanks! -Kishon > >> v4 >> - fixes in dt-binding document >> - fix typo >> - change to typec-dir-debounce-ms and add min/max/default values >> - drop reference to uint32 type >> - fixes in driver >> - change to updated typec-dir-debounce-ms property >> - add limit checks and use default value if not specified >> >> v3 >> - Rebase on v2 of PHY series and update DT binding to yaml >> >> v2 >> - revise commit log of patch 1 >> - use regmap_field in patch 3 >> >> >> Roger Quadros (3): >> phy: cadence: Sierra: add phy_reset hook >> dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO >> phy: ti: j721e-wiz: Manage typec-gpio-dir >> >> .../bindings/phy/ti,phy-j721e-wiz.yaml | 17 ++++++ >> drivers/phy/cadence/phy-cadence-sierra.c | 10 +++ >> drivers/phy/ti/phy-j721e-wiz.c | 61 +++++++++++++++++++ >> 3 files changed, 88 insertions(+) >> >
