On Mon, Jan 06, 2020 at 10:27:24AM +0100, Maxime Ripard wrote: > Hi Rob, > > On Sat, Jan 04, 2020 at 03:13:21PM -0700, Rob Herring wrote: > > On Fri, Jan 03, 2020 at 04:28:24PM +0100, Maxime Ripard wrote: > > > The Allwinner A80 SoCs have a USB PHY controller that is used by Linux, > > > with a matching Device Tree binding. > > > > > > Now that we have the DT validation in place, let's convert the device tree > > > bindings for that controller over to a YAML schemas. > > > > > > Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx> > > > Signed-off-by: Maxime Ripard <maxime@xxxxxxxxxx> > > > > > > --- > > > > > > Changes from v1: > > > - Added r-b tag from chen-yu > > > --- > > > .../phy/allwinner,sun9i-a80-usb-phy.yaml | 135 ++++++++++++++++++ > > > .../devicetree/bindings/phy/sun9i-usb-phy.txt | 37 ----- > > > 2 files changed, 135 insertions(+), 37 deletions(-) > > > create mode 100644 Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml > > > delete mode 100644 Documentation/devicetree/bindings/phy/sun9i-usb-phy.txt > > > > > > diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml > > > new file mode 100644 > > > index 000000000000..ded7d6f0a119 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml > > > @@ -0,0 +1,135 @@ > > > +# SPDX-License-Identifier: GPL-2.0 > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Allwinner A80 USB PHY Device Tree Bindings > > > + > > > +maintainers: > > > + - Chen-Yu Tsai <wens@xxxxxxxx> > > > + - Maxime Ripard <mripard@xxxxxxxxxx> > > > + > > > +properties: > > > + "#phy-cells": > > > + const: 0 > > > + > > > + compatible: > > > + const: allwinner,sun9i-a80-usb-phy > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + clocks: > > > + anyOf: > > > + - description: Main PHY Clock > > > + > > > + - items: > > > + - description: Main PHY clock > > > + - description: HSIC 12MHz clock > > > + - description: HSIC 480MHz clock > > > > Rather than anyOf, just 'minItems: 1' would work here. Though I guess > > this disallows 2 items. > > Yeah, 2 items is not allowed so I wanted to prevent that. > > > > + > > > + clock-names: > > > + oneOf: > > > + - const: phy > > > + > > > + - items: > > > + - const: phy > > > + - const: hsic_12M > > > + - const: hsic_480M > > > + > > > + resets: > > > + anyOf: > > > + - description: Normal USB PHY reset > > > + > > > + - items: > > > + - description: Normal USB PHY reset > > > + - description: HSIC Reset > > > + > > > + reset-names: > > > + oneOf: > > > + - const: phy > > > + > > > + - items: > > > + - const: phy > > > + - const: hsic > > > + > > > + phy_type: > > > + const: hsic > > > + description: > > > + When absent, the PHY type will be assumed to be normal USB. > > > + > > > + phy-supply: > > > + description: > > > + Regulator that powers VBUS > > > + > > > +required: > > > + - "#phy-cells" > > > + - compatible > > > + - reg > > > + - clocks > > > + - clock-names > > > + - resets > > > + - reset-names > > > + > > > +additionalProperties: false > > > + > > > +if: > > > + properties: > > > + phy_type: > > > + const: hsic > > > + > > > + required: > > > + - phy_type > > > + > > > +then: > > > + properties: > > > + clocks: > > > + maxItems: 3 > > > + > > > + clock-names: > > > + maxItems: 3 > > > + > > > + resets: > > > + maxItems: 2 > > > + > > > + reset-names: > > > + maxItems: 2 > > > > Do you intend that only a single item is allowed when not HSIC? If so, > > that's not what is happening. > > That's intentional indeed, the former binding was making the hsic > clocks and resets mandatory when the phy was in HSIC mode, but only > recommending listing them otherwise. Maybe we can change that in the > future, but that seems out of scope for a conversion. Okay. In that case, Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
