On Fri, Jan 03, 2020 at 06:14:00PM +0530, Vidya Sagar wrote: > Update the firmware header to support uninitialization of UPHY PLL > when the PCIe controller is operating in endpoint mode and host cuts > the PCIe reference clock. > > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx> > --- > V2: > * Changed Copyright year from 2019 to 2020 > > include/soc/tegra/bpmp-abi.h | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) Bjorn, Lorenzo, subsequent patches in this series depend on this patch, so I think it'd be best if you took this into the PCI tree along with the DT bindings and the PCI driver changes, so: Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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