Enable DWC3 controller for Meson A1 SoC.
Signed-off-by: Hanjie Lin <hanjie.lin@xxxxxxxxxxx>
Signed-off-by: Yue Wang <yue.wang@xxxxxxxxxxx>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 33 +++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index bd63374a..76f787d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -7,6 +7,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/meson-a1-power.h>
#include <dt-bindings/reset/amlogic,meson-a1-reset.h>
+#include <dt-bindings/clock/a1-pll-clkc.h>
+#include <dt-bindings/clock/a1-clkc.h>
/ {
compatible = "amlogic,a1";
@@ -125,6 +127,37 @@
#interrupt-cells = <3>;
#address-cells = <0>;
};
+
+ usb: usb@ffe09000 {
+ status = "okay";
+ compatible = "amlogic,meson-a1-usb-ctrl";
+ reg = <0x0 0xffe09000 0x0 0xa0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&clkc_periphs CLKID_USB_CTRL>,
+ <&clkc_periphs CLKID_USB_BUS>,
+ <&clkc_periphs CLKID_XTAL_USB_PHY>,
+ <&clkc_periphs CLKID_XTAL_USB_CTRL>;
+ clock-names = "usb_ctrl", "usb_bus", "xtal_usb_phy",
+ "xtal_usb_ctrl";
+ resets = <&reset RESET_USBCTRL>;
+
+ dr_mode = "host";
+
+ phys = <&usb2_phy1>;
+ phy-names = "usb2-phy1";
+
+ dwc3: usb@ff400000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff400000 0x0 0x100000>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ snps,dis_u2_susphy_quirk;
+ snps,quirk-frame-length-adjustment = <0x20>;
+ };
+ };
};
timer {
--
2.7.4
