On Tue, Dec 24, 2019 at 06:39:42PM +0100, Remi Pommarel wrote: > Add documentation for PCIE PHYs found in AXG SoCs. > > Signed-off-by: Remi Pommarel <repk@xxxxxxxxxxxx> > --- > .../bindings/phy/amlogic,meson-axg-pcie.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml > > diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml > new file mode 100644 > index 000000000000..c622a1b38ffc > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2019 BayLibre, SAS > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-pcie.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Amlogic AXG PCIE PHY > + > +maintainers: > + - Remi Pommarel <repk@xxxxxxxxxxxx> > + > +properties: > + compatible: > + enum: > + - amlogic,axg-pcie-phy > + > + reg: > + maxItems: 1 > + > + aml,hhi-gpr: > + maxItems: 1 My bad, I didn't know about devicetree schemas and their verification, I will fix the missing $ref: '/schemas/types.yaml#/definitions/phandle' here, add a description and add the missing include for reset in the example below in v4 along with upcoming comments on the other patches. Sorry about that. > + > + resets: > + maxItems: 1 > + > + reset-names: > + items: > + - const: phy > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - aml,hhi-gpr > + - resets > + - reset-names > + - "#phy-cells" > + > +examples: > + - | > + pcie_phy: pcie-phy@ff644000 { > + compatible = "amlogic,axg-pcie-phy"; > + reg = <0x0 0xff644000 0x0 0x2000>; > + aml,hhi-gpr = <&sysctrl>; > + resets = <&reset RESET_PCIE_PHY>; > + reset-names = "phy"; > + #phy-cells = <0>; > + }; > -- > 2.24.0 >
