> +static int ines_clock_init(struct ines_clock *clock, struct device *device, > + void __iomem *addr) > +{ > + struct device_node *node = device->of_node; > + unsigned long port_addr; > + struct ines_port *port; > + int i, j; > + > + INIT_LIST_HEAD(&clock->list); > + clock->node = node; > + clock->dev = device; > + clock->base = addr; > + clock->regs = clock->base; > + > + for (i = 0; i < INES_N_PORTS; i++) { > + port = &clock->port[i]; > + port_addr = (unsigned long) clock->base + > + INES_PORT_OFFSET + i * INES_PORT_SIZE; > + port->regs = (struct ines_port_registers *) port_addr; > + port->clock = clock; > + port->index = i; > + INIT_DELAYED_WORK(&port->ts_work, ines_txtstamp_work); > + spin_lock_init(&port->lock); > + INIT_LIST_HEAD(&port->events); > + INIT_LIST_HEAD(&port->pool); > + for (j = 0; j < INES_MAX_EVENTS; j++) > + list_add(&port->pool_data[j].list, &port->pool); > + } > + > + ines_write32(clock, 0xBEEF, test); > + ines_write32(clock, 0xBEEF, test2); > + > + dev_dbg(device, "ID 0x%x\n", ines_read32(clock, id)); > + dev_dbg(device, "TEST 0x%x\n", ines_read32(clock, test)); > + dev_dbg(device, "VERSION 0x%x\n", ines_read32(clock, version)); > + dev_dbg(device, "TEST2 0x%x\n", ines_read32(clock, test2)); Hi Richard Since you are respinnig... Maybe fail the probe if when you read back test and tests they don't have the expected value? Andrew