On 12/18/19 3:49 AM, Daniel Mack wrote:
Hi,
On 12/17/19 8:28 PM, Pierre-Louis Bossart wrote:
On 12/9/19 12:35 PM, Daniel Mack wrote:
+ if (!ad242x_node_is_master(priv->node) &&
+ ((format & SND_SOC_DAIFMT_MASTER_MASK) !=
SND_SOC_DAIFMT_CBM_CFM)) {
+ dev_err(component->dev, "slave node must be clock master\n");
+ return -EINVAL;
+ }
It was my understanding that the master node provides the clock to the
bus, so not sure how it could be a clock slave, and conversely how a
slave node could provide a clock to the bus?
The slave nodes receive the A2B clock from the master node and then
produce digital audio output that is sent to other components such as
codecs. Hence, in ASoC terms, they are the clock master.
Likewise, as the master node is receiving its clock from other
components, it has to be a clock slave in the audio network.
Does that make sense?
Your slave node acts as a bridge then, but it seems you don't model the
bus-facing interface, which has to follow the master clock. Or do you?
Likewise the master has an 'SOC-facing' interface and a bus-facing
interface. it *could* be master on both if ASRC was supported. The point
is that the bus-facing interface is not clock slave.
