dcfg use little endian that SoC register value will be correct Signed-off-by: Yinbo Zhu <yinbo.zhu@xxxxxxx> Acked-by: Shawn Guo <shawnguo@xxxxxxxxxx> Acked-by: Yangbo Lu <yangbo.lu@xxxxxxx> --- Change in v2: Add Acked-by arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 8e8a77eb596a..8b28fda2ca20 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -175,7 +175,7 @@ dcfg: syscon@1e00000 { compatible = "fsl,ls1028a-dcfg", "syscon"; reg = <0x0 0x1e00000 0x0 0x10000>; - big-endian; + little-endian; }; scfg: syscon@1fc0000 { -- 2.17.1