Hi CK,
On Tue, 2019-12-10 at 15:55 +0800, CK Hu wrote:
> Hi, Dennis:
>
> On Wed, 2019-11-27 at 09:58 +0800, Dennis YC Hsieh wrote:
> > Add read_s function in cmdq helper functions which support read value from
> > register or dma physical address into gce internal register.
> >
> > Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@xxxxxxxxxxxx>
> > ---
> > drivers/soc/mediatek/mtk-cmdq-helper.c | 20 ++++++++++++++++++++
> > include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> > include/linux/soc/mediatek/mtk-cmdq.h | 10 ++++++++++
> > 3 files changed, 31 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > index 2edbc0954d97..2cd693e34980 100644
> > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > @@ -231,6 +231,26 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> > }
> > EXPORT_SYMBOL(cmdq_pkt_write_mask);
> >
> > +int cmdq_pkt_read_s(struct cmdq_pkt *pkt, phys_addr_t addr, u16 reg_idx)
> > +{
>
> Should addr be shifted in mt6779?
>
> Regards,
> CK
>
no, only pc and end register shift address
no need to shift in instruction
Regards,
Dennis
> > + struct cmdq_instruction inst = { {0} };
> > + int err;
> > + const u16 src_reg_idx = CMDQ_SPR_TEMP;
> > +
> > + err = cmdq_pkt_assign(pkt, src_reg_idx, CMDQ_ADDR_HIGH(addr));
> > + if (err < 0)
> > + return err;
> > +
> > + inst.op = CMDQ_CODE_READ_S;
> > + inst.dst_t = CMDQ_REG_TYPE;
> > + inst.sop = src_reg_idx;
> > + inst.reg_dst = reg_idx;
> > + inst.arg_b = CMDQ_ADDR_LOW(addr);
> > +
> > + return cmdq_pkt_append_command(pkt, inst);
> > +}
> > +EXPORT_SYMBOL(cmdq_pkt_read_s);
> > +
> > int cmdq_pkt_write_s(struct cmdq_pkt *pkt, phys_addr_t addr, u16 reg_idx,
> > u32 mask)
> > {
> > diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> > index 8ef87e1bd03b..3f6bc0dfd5da 100644
> > --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> > +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> > @@ -59,6 +59,7 @@ enum cmdq_code {
> > CMDQ_CODE_JUMP = 0x10,
> > CMDQ_CODE_WFE = 0x20,
> > CMDQ_CODE_EOC = 0x40,
> > + CMDQ_CODE_READ_S = 0x80,
> > CMDQ_CODE_WRITE_S = 0x90,
> > CMDQ_CODE_WRITE_S_MASK = 0x91,
> > CMDQ_CODE_LOGIC = 0xa0,
> > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> > index 56ff1970197c..bc28a41d7780 100644
> > --- a/include/linux/soc/mediatek/mtk-cmdq.h
> > +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> > @@ -106,6 +106,16 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
> > int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> > u16 offset, u32 value, u32 mask);
> >
> > +/**
> > + * cmdq_pkt_read_s() - append read_s command to the CMDQ packet
> > + * @pkt: the CMDQ packet
> > + * @addr: the physical address of register or dma to read
> > + * @reg_idx: the CMDQ internal register ID to cache read data
> > + *
> > + * Return: 0 for success; else the error code is returned
> > + */
> > +int cmdq_pkt_read_s(struct cmdq_pkt *pkt, phys_addr_t addr, u16 reg_idx);
> > +
> > /**
> > * cmdq_pkt_write_s_mask() - append write_s command to the CMDQ packet
> > * @pkt: the CMDQ packet
>
>
