On Thu, Dec 05, 2019 at 08:06:28AM +0000, Jun Li wrote:
> From: Li Jun <jun.li@xxxxxxx>
>
> USB1 port has typec connector with power delivery support:
> - Dual data role: host and device.
> - Dual power role: source and sink, prefer power sink.
>
> Signed-off-by: Li Jun <jun.li@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 65 +++++++++++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> index 2a74330..61511e9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> @@ -3,6 +3,7 @@
> * Copyright 2019 NXP
> */
>
> +#include <dt-bindings/usb/pd.h>
> #include "imx8mn.dtsi"
>
> / {
> @@ -60,6 +61,42 @@
> status = "okay";
> };
>
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + ptn5110: tcpc@50 {
> + compatible = "nxp,ptn5110";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_typec1>;
> + reg = <0x50>;
> + interrupt-parent = <&gpio2>;
> + interrupts = <11 8>;
We prefer to use macro for IRQ type:
s/8/IRQ_TYPE_LEVEL_LOW
I fixed it up and applied all 3 patches.
Shawn
> + status = "okay";
> +
> + port {
> + typec1_dr_sw: endpoint {
> + remote-endpoint = <&usb1_drd_sw>;
> + };
> + };
> +
> + typec1_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + power-role = "dual";
> + data-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + op-sink-microwatt = <15000000>;
> + self-powered;
> + };
> + };
> +};
> +
> &snvs_pwrkey {
> status = "okay";
> };
> @@ -70,6 +107,21 @@
> status = "okay";
> };
>
> +&usbotg1 {
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + adp-disable;
> + usb-role-switch;
> + status = "okay";
> +
> + port {
> + usb1_drd_sw: endpoint {
> + remote-endpoint = <&typec1_dr_sw>;
> + };
> + };
> +};
> +
> &usdhc2 {
> assigned-clocks = <&clk IMX8MN_CLK_USDHC2>;
> assigned-clock-rates = <200000000>;
> @@ -138,12 +190,25 @@
> >;
> };
>
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
> + MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
> + >;
> + };
> +
> pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
> fsl,pins = <
> MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
> >;
> };
>
> + pinctrl_typec1: typec1grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
> + >;
> + };
> +
> pinctrl_uart2: uart2grp {
> fsl,pins = <
> MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> --
> 2.7.4
>
