RE: [PATCH v2 2/6] dt-bindings: spi: Document Renesas SPIBSC bindings

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On Tue, Dec 10, 2019, Geert Uytterhoeven wrote:
> > > The second one is not needed, if you would add "ranges" for the
> > > memory-mapped mode.
> >
> >    I'm not sure we can do that. The flash bus is accessed via a window
> > with the high bits in the DREAR reg, even in the direct read mode...
> 
> So if the FLASH is too large, you cannot access all of it without programming
> the high bits.
> However, when using XIP,  you're limited to the window size anyway.

If your SPI flash supports 32-bit address commands, ("4READ" for 
example) then all 32-bit are sent out.

The 'high bits' that he's talking about is for accessing SPI that is 
beyond the XIP window size.

For example, the RZ/A1 has 64MB window size (RZ/A2=256MB). Meaning 
anything above 64MB is not accessible.
However, you could program this register to basically change the window 
starting point and make the upper 64MB of a 128MB flash visible and the
lower 64MB portion hidden.
For an XIP system, this is one way of doing a remote firmware update 
and keeping the old copy around just in case you need to revert back.

Anyway, the point is this doesn't matter in either the MTD/SPI or 
MTD/ROM operation of the driver as far as I can see.

Chris





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