CLK_S_GMAC0_PHY & CLK_S_ETH1_PH clocks are no longer used.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@xxxxxxxxxx>
---
arch/arm/boot/dts/stih415-clock.dtsi | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/arch/arm/boot/dts/stih415-clock.dtsi b/arch/arm/boot/dts/stih415-clock.dtsi
index 5bdba06..24a7508 100644
--- a/arch/arm/boot/dts/stih415-clock.dtsi
+++ b/arch/arm/boot/dts/stih415-clock.dtsi
@@ -32,20 +32,6 @@
clock-frequency = <500000000>;
};
- CLKS_GMAC0_PHY: clockgenA1@7 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
- clock-output-names = "CLKS_GMAC0_PHY";
- };
-
- CLKS_ETH1_PHY: clockgenA0@7 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
- clock-output-names = "CLKS_ETH1_PHY";
- };
-
/*
* ClockGenAs on SASG1
*/
--
1.9.1
--
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