Move /reserved-memory node from RTD1295 to RTD129x DT. Convert RPC /memreserve/s into /reserved-memory nodes. Fixes: 72a7786c0a0d ("ARM64: dts: Add Realtek RTD1295 and Zidoo X9S") Fixes: f8b3436dad5c ("arm64: dts: realtek: Factor out common RTD129x parts") Signed-off-by: Andreas Färber <afaerber@xxxxxxx> --- v1 -> v2: Unchanged * Added Fixes headers arch/arm64/boot/dts/realtek/rtd1295.dtsi | 13 +------------ arch/arm64/boot/dts/realtek/rtd129x.dtsi | 23 ++++++++++++++++++++--- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 34f6cc6f16fe..1402abe80ea1 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -2,7 +2,7 @@ /* * Realtek RTD1295 SoC * - * Copyright (c) 2016-2017 Andreas Färber + * Copyright (c) 2016-2019 Andreas Färber */ #include "rtd129x.dtsi" @@ -47,17 +47,6 @@ }; }; - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - tee@10100000 { - reg = <0x10100000 0xf00000>; - no-map; - }; - }; - timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 4433114476f5..8d80cca945bc 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -2,14 +2,12 @@ /* * Realtek RTD1293/RTD1295/RTD1296 SoC * - * Copyright (c) 2016-2017 Andreas Färber + * Copyright (c) 2016-2019 Andreas Färber */ /memreserve/ 0x0000000000000000 0x0000000000030000; -/memreserve/ 0x000000000001f000 0x0000000000001000; /memreserve/ 0x0000000000030000 0x00000000000d0000; /memreserve/ 0x0000000001b00000 0x00000000004be000; -/memreserve/ 0x0000000001ffe000 0x0000000000004000; #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/realtek,rtd1295.h> @@ -19,6 +17,25 @@ #address-cells = <1>; #size-cells = <1>; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rpc_comm: rpc@1f000 { + reg = <0x1f000 0x1000>; + }; + + rpc_ringbuf: rpc@1ffe000 { + reg = <0x1ffe000 0x4000>; + }; + + tee: tee@10100000 { + reg = <0x10100000 0xf00000>; + no-map; + }; + }; + arm_pmu: arm-pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; -- 2.16.4