On Mon, Nov 25, 2019 at 6:58 AM Yash Shah <yash.shah@xxxxxxxxxx> wrote: > Adds the GPIO driver for SiFive RISC-V SoCs. > > Signed-off-by: Wesley W. Terpstra <wesley@xxxxxxxxxx> > [Atish: Various fixes and code cleanup] > Signed-off-by: Atish Patra <atish.patra@xxxxxxx> > Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx> Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> I suppose Marc will merge all patches into the irqchip tree as they are logically dependent? If you want the GPIO bindings and this driver directly merged (no deps) then I can do that as well. Yours, Linus Walleij
