On Fri, May 02, 2014 at 12:01:58PM +0530, George Cherian wrote: > The series adds CPTS support for AM4372. > > Patch 1 - DT changes w.r.t clock changes for AM33xx. > Patch 2 - CPTS clock name harcoding in the driver is removed. > Easier to pass the clock name from dt rather than hardcoding in driver. > Also in prepration for DRA7x CPTS support. > Patch 3 - Enable the CPTS support for both DRA7x and AM4372 in the driver. > Patch 4 - Enable the Annexe F for L2 PTP for AM437x and DRA7x. > Patch 5 - Change the default clocksource to dpll_core_m5 > Patch 6 - DT changes for AM4372. > > > v1 -> v2 > Patch 1 and 2 Re-ordering. > Seperate TS_BITS define for Hw version V2 and V3 Acked-by: Richard Cochran <richardcochran@xxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
