On Tue, 2019-11-26 at 09:37 +0000, Phil Elwell wrote: > Hi Nicolas, > > On 26/11/2019 09:19, Nicolas Saenz Julienne wrote: > > This enables bcm2711's PCIe bus, which is hardwired to a VIA > > Technologies XHCI USB 3.0 controller. > > > > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@xxxxxxx> > > > > --- > > > > This will likely need a rebase once the RPi GENET patches land. > > > > Changes since v2: > > - Remove unused interrupt-map > > - correct dma-ranges to it's full size, non power of 2 bus DMA > > constraints now supported in linux-next[1] > > - add device_type > > - rename alias from pcie_0 to pcie0 > > > > Changes since v1: > > - remove linux,pci-domain > > > > [1] https://lkml.org/lkml/2019/11/21/235 > > > > arch/arm/boot/dts/bcm2711.dtsi | 41 ++++++++++++++++++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > > > diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi > > index 667658497898..2e121fc8b3d0 100644 > > --- a/arch/arm/boot/dts/bcm2711.dtsi > > +++ b/arch/arm/boot/dts/bcm2711.dtsi > > @@ -288,6 +288,47 @@ IRQ_TYPE_LEVEL_LOW)>, > > arm,cpu-registers-not-fw-configured; > > }; > > > > + scb { > > + compatible = "simple-bus"; > > + #address-cells = <2>; > > + #size-cells = <1>; > > + > > + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, > > + <0x6 0x00000000 0x6 0x00000000 0x40000000>; > > + > > + pcie0: pcie@7d500000 { > > + compatible = "brcm,bcm2711-pcie"; > > + reg = <0x0 0x7d500000 0x9310>; > > + device_type = "pci"; > > + #address-cells = <3>; > > + #interrupt-cells = <1>; > > + #size-cells = <2>; > > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "pcie", "msi"; > > + interrupt-map-mask = <0x0 0x0 0x0 0x7>; > > + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 > > + IRQ_TYPE_LEVEL_HIGH>; > > + msi-controller; > > + msi-parent = <&pcie0>; > > + > > + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 > > + 0x0 0x04000000>; > > + /* > > + * The wrapper around the PCIe block has a bug > > + * preventing it from accessing beyond the first 3GB of > > + * memory. As the bus DMA mask is rounded up to the > > + * closest power of two of the dma-range size, we're > > + * forced to set the limit at 2GB. This can be > > + * harmlessly changed in the future once the DMA code > > + * handles non power of two DMA limits. > > + */ > > + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 > > + 0x0 0xc0000000>; > > The comment doesn't match the data here - I think for now the size field > needs to be reduced to 2GB to match the comment. You're right, my bad, should've edited it out. The good part is that with this commit[1], which will soon be in Linus' tree, we don't need to fake dma-ranges size anymore. So for the record, the comment should state the following: /* * The wrapper around the PCIe block has a bug * preventing it from accessing beyond the first 3GB of * memory. */ Regards, Nicolas [1] https://lkml.org/lkml/2019/11/21/235
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