On Tue, Nov 19, 2019 at 12:03:31PM +0000, Andre Przywara wrote:
> Older versions of the Juno *SoC* TRM [1] recommended that the UART clock
> source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more
> correct value of 7.3728 MHz. Somehow the wrong value managed to end up in
> our DT.
> Doing a prime factorisation, a modulo divide by 115200 and trying
> to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest
> that the old value was actually a typo. The actual UART clock is driven
> by a PLL, configured via a parameter in some board.txt file in the
> firmware, which reads 7.37 MHz (sic!).
>
> Fix this to correct the baud rate divisor calculation on the Juno board.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
>
Do we need fixes tag here ? Unless someone objects I will add and apply
this patch:
Fixes: 71f867ec130e ("arm64: Add Juno board device tree.")
--
Regards,
Sudeep
